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Chapter 1: SP623 Board Features and Operation
The CP2103 supports an IO voltage range of 1.8V to 2.5V on the SP623 board. The
connections between the FPGA and CP2103 should use the LVCMOS25 IO standard.
UART IP (for example, Xilinx? XPS UART Lite) must be implemented in the FPGA fabric.
The FPGA supports the USB to UART bridge using four signal pins:
?
?
?
?
Transmit (TX)
Receive (RX)
Request to Send (RTS)
Clear to Send (CTS).
Connections of these signals between the FPGA and the CP2103 at U26 are listed in
Table 1-15:
FPGA to U26 (CP2103 USB to UART Bridge) Connections
FPGA Pin
L23
L23
N20
N19
FPGA Function
RTS, output
CTS, input
TX, data out
RX, data in
Net Name
USB_CTS
USB_RTS
USB_RX
USB_TX
U26 Pin
22
23
24
25
U26 Function
CTS, input
RTS, output
RXD, data in
TXD, data out
The bridge device also provides as many as 4 GPIO signals that can be defined by the user
for status and control information ( Table 1-16 ).
Table 1-16:
CP2103 USB to UART Bridge User GPIO
FPGA Pin
P22
P21
N22
N21
Net Name
USB_GPIO0
USB_GPIO1
USB_GPIO2
USB_GPIO3
U26 Pin
19
18
17
16
A royalty-free software driver named Virtual COM Port (VCP) is available from Silicon
Laboratories. This driver permits the CP2103 USB to UART bridge to appear as a COM
port to the host computer communications application software (for example,
HyperTermimal or TeraTerm). The VCP driver must be installed on the host computer
prior to establishing communications with the SP623 board.
FMC HPC Connectors
The SP623 board features two high pin count (HPC) connectors as defined by the VITA
57.1.1 FMC specification. Each FMC HPC connector is a 10 x 40 position socket that is fully
populated with 400 pins. See Appendix B, VITA 57.1 FMC HPC Connector Pinout for a
cross-reference of signal names to pin coordinates.
The FMC1 HPC connector at J112 on the SP623 board provides connectivity for:
?
58 differential user-defined pairs:
?
?
34 LA pairs
24 HA pairs
24
SP623 Board User Guide
UG751 (v1.1) September 15, 2010
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